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Chapter 2, Activity 5, Build An ALU

September 7, 2011

The most confusing part of this one for me was how determine if the output was zero or not. I realized I just needed to Or all the bits, but there was only an 8 way Or. I had some problems figuring out how to split the output into two separate bytes. I tried this:

Or8(a=inner_pins[0..7], ...);

but you can’t split an inner bus while using it as input. However, you can split the output of a gate as much as you want:

And16(..., out[0..7]=half_out, out[8-15]=other_half_out, out=all_of_out);

It makes more sense the other way for me, but I could be crazy.

Also this was the first time I started to think about issues of timing, which I don’t think we are supposed to worry about yet.

Without further self reflection:

CHIP ALU {
    IN  // 16-bit inputs:
        x[16], y[16],
        // Control bits:
        zx, // Zero the x input
        nx, // Negate the x input
        zy, // Zero the y input
        ny, // Negate the y input
        f,  // Function code: 1 for add, 0 for and
        no; // Negate the out output

    OUT // 16-bit output
        out[16],

        // ALU output flags
        zr, // 1 if out=0, 0 otherwise
        ng; // 1 if out<0, 0 otherwise

    PARTS:
    // Implementation missing.
    Mux16(a=x, b=false, sel=zx, out=x1);
    Not16(in=x1,out=x2);
    Mux16(a=x1,b=x2,sel=nx, out=xgo);

    Mux16(a=y, b=false, sel=zy, out=y1);
    Not16(in=y1,out=y2);
    Mux16(a=y1,b=y2,sel=ny, out=ygo);

    And16(a=xgo,b=ygo,out=xandy);
    Add16(a=xgo,b=ygo,out=xplusy);

    Mux16(a=xandy, b=xplusy, sel=f, out=out1);

    Not16(in=out1, out=out2);
    Mux16(a=out1,b=out2, sel=no, out[0..7]=or0, out[8..15]=or1,out[15]=ng, out=out);
    Or8Way(in=or0, out=outor1);
    Or8Way(in=or1, out=outor2);
    Or(a=outor1, b=outor2, out=prezr);
    Not(in=prezr, out=zr);
}

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3 Comments
  1. Hi,

    I am just following up with everyone who started the course, but have not perhaps had the time/opportunity to continue working on it.

    Along with being a friendly reminder that the “Elements of Computing Systems” course is waiting for you :-), I also wanted to understand the reasons for the drop in activity.

    – Did the new code sharing policy put you off ?

    – Is it because the website is not easy to navigate ?

    – Is it because you are not getting the learning experience you expected ?

    Do let me know how I can make the website / experience better for you.

    Thanks

  2. anonymous permalink

    Instead of the first Mux16 for the x&y I ANDed the variable with the inverse of the zero variable flag. That split the output of the Mux near the end for the zero flag test was handy as I misunderstood that part of the appendix.

    Not(in=zy,out=invzy); And16(a=y,b[0]=invzy,b[1]=invzy,b[2]=invzy,b[3]=invzy,b[4]=invzy,b[5]=invzy,b[6]=invzy,b[7]=invzy,b[8]=invzy,b[9]=invzy,b[10]=invzy,b[11]=invzy,b[12]=invzy,b[13]=invzy,b[14]=invzy,b[15]=invzy,out=y0);

  3. This helped me out thanks. My issues was the syntax of splitting up the pins. I think the book should cover this more clearly.

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